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European platform for low-power applications on silicon-on-insulator technology. (EUROSOI+)

In the framework of FP6, the European Commission supported the formation of a European Network on Silicon on Insulator Technology, Devices and Circuits, whose main goal was to create a discussion forum for the exchange of ideas and results on the topic of Silicon-On-Insulator technologies in Europe, and to facilitate the synergy between research groups which enables the use of Silicon-On-Insulator (SOI) technology as an effective tool to push the limits of CMOS and prepare for post-CMOS. Today, EUROSOI network comprises more than 30 partners all over Europe, with expertise in all the fields of the SOI technology. EUROSOI network has already made possible a big part of this path by successfully organizing and achieving during the last three years an important number of events such as the EUROSOI roadmap and state of the art documents, workshops, training events, scientific exchanges. The first goal of the present proposal is upgrading and maintaining this important forum, providing upgraded versions of the State-of-the-Art report, Roadmap, facilitating scientific exchanges between partners, organizing workshops and later on, to use it as a launching platform for other important objectives: - Creation of a Permanent European School on SOI Technology. - Fostering and co-ordinating the initiatives and activities required to successfully face some of the challenges identified and listed in the EUROSOI Roadmap for the future. Creation of a consortium to elaborate new research project proposals addressing specific challenges identified in the Roadmap. - Development of a research-dedicated platform in order to address circuit design aspects, focussing on the advantage of SOI technology for Low Power applications. This platform will provide, through the integration at some point in EUROPRACTICE, prototyping and Multi-Projects-Wafers (MPW) in SOI open to European research groups and Fabless Semiconductor companies (SMEs) using LETI SOI process in two-three years.
Universidad de Granada
In the framework of FP6, the European Commission supported the formation of a European Network on Silicon on Insulator Technology, Devices and Circuits, whose main goal was to create a discussion forum for the exchange of ideas and results on the topic of Silicon-On-Insulator technologies in Europe, and to facilitate the synergy between research groups which enables the use of Silicon-On-Insulator (SOI) technology as an effective tool to push the limits of CMOS and prepare for post-CMOS. Today, EUROSOI network comprises more than 30 partners all over Europe, with expertise in all the fields of the SOI technology. EUROSOI network has already made possible a big part of this path by successfully organizing and achieving during the last three years an important number of events such as the EUROSOI roadmap and state of the art documents, workshops, training events, scientific exchanges. The first goal of the present proposal is upgrading and maintaining this important forum, providing upgraded versions of the State-of-the-Art report, Roadmap, facilitating scientific exchanges between partners, organizing workshops and later on, to use it as a launching platform for other important objectives: - Creation of a Permanent European School on SOI Technology. - Fostering and co-ordinating the initiatives and activities required to successfully face some of the challenges identified and listed in the EUROSOI Roadmap for the future. Creation of a consortium to elaborate new research project proposals addressing specific challenges identified in the Roadmap. - Development of a research-dedicated platform in order to address circuit design aspects, focussing on the advantage of SOI technology for Low Power applications. This platform will provide, through the integration at some point in EUROPRACTICE, prototyping and Multi-Projects-Wafers (MPW) in SOI open to European research groups and Fabless Semiconductor companies (SMEs) using LETI SOI process in two-three years.
Coordinación del proyecto, elaboración de informes, puesta a punto de una plataforma europea para el prototipado y diseño de circuitos SOI para aplicaciones de alta frecuencia y baja potencia. Organización de un workshop y dos tutoriales. Mantenimiento de una base de datos sobre SOI.
publications, reports, workshops, courses, meetings
La tecnología de Silicio sobre aislante (SOI) se ha reconido internacionalmente como la tecnología clave para aplicaciones de baja potencia y alta frecuencia. La fabricación de sistemas electrónicos en tecnología SOI proporciona una disminución importante de la energia disipada (green electronics) y una mejora importante de las prestaciones del sistema, sobre los parámetros que se obtendrian usando tecnología convencional. Sin embargo, antes de EUROSOI+ no existía en Europa ninguna posibilidad asequible de acceso a esta tecnología para los grupos universitarios y PYMES dedicadas al diseño electrónico. El proyecto EUROSOI+ ha puesto en marcha una plataforma tecnológica que utiliza la tecnología FDSOI de 20nm del CEA-LETI en Grenoble, y que da acceso a los grupos de diseño electrónico europeos (privados y públicos) a una de las tecnologías nanoelectrónicas de vanguardia mundial con los siguientes beneficios: -Bajo coste de prototipado a través de uso de Multi-Project-Wafer. -Reducción de potencia disipada por sistema (Power saving, green electronics). -Mejora de las prestaciones del sistema en un factor 1.5 y 2, comparado a su implentación en tecnologias convencionales.

Grupo en Nanoelectronica

Code PAIDI: TIC-216

Francisco Jesús Gámiz Pérez. Coordinador. 

Universidad de Granada

Budget of Andalusian group: € 363,300.00

nanoelectronics.ugr.es

  • COMMISSARIAT A L ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES FRANCE
  • UNIVERSITE CATHOLIQUE DE LOUVAIN BELGIUM
  • INSTITUT POLYTECHNIQUE DE GRENOBLE FRANCE
  • CHALMERS TEKNISKA HOEGSKOLA AB SWEDEN
  • INTERUNIVERSITAIR MICROELECTRONICA CENTRUM VZW BELGIUM
  • UNIVERSITY COLLEGE CORK, NATIONAL UNIVERSITY OF IRELAND, CORK IRELAND
Keywords: silicon-on-insulator
Duration: 42 months. January, 1th 2008 to June, 30th 2011
Project cost: € 800,000.00